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Silicon Labs /Series0 /EZR32WG /EZR32WG230F256R68 /DMA /CHALTC

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Interpret as CHALTC

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https://regviz.com/r/Silicon Labs/Series0/EZR32WG/EZR32WG230F256R68/DMA/CHALTC#0x0

31282724232019161512118743000000000000000000000000000000000000000000 (CH0ALTC)CH0ALTC0 (CH1ALTC)CH1ALTC0 (CH2ALTC)CH2ALTC0 (CH3ALTC)CH3ALTC0 (CH4ALTC)CH4ALTC0 (CH5ALTC)CH5ALTC0 (CH6ALTC)CH6ALTC0 (CH7ALTC)CH7ALTC0 (CH8ALTC)CH8ALTC0 (CH9ALTC)CH9ALTC0 (CH10ALTC)CH10ALTC0 (CH11ALTC)CH11ALTC

Description

Channel Alternate Clear Register

Fields

CH0ALTC

Channel 0 Alternate Clear
CH1ALTC

Channel 1 Alternate Clear
CH2ALTC

Channel 2 Alternate Clear
CH3ALTC

Channel 3 Alternate Clear
CH4ALTC

Channel 4 Alternate Clear
CH5ALTC

Channel 5 Alternate Clear
CH6ALTC

Channel 6 Alternate Clear
CH7ALTC

Channel 7 Alternate Clear
CH8ALTC

Channel 8 Alternate Clear
CH9ALTC

Channel 9 Alternate Clear
CH10ALTC

Channel 10 Alternate Clear
CH11ALTC

Channel 11 Alternate Clear

Links

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Register License

  • SPDX-License-Identifier: Zlib
  • The licensor of this software is Silicon Laboratories Inc.
  • This software is provided ‘as-is’, without any express or implied
  • warranty. In no event will the authors be held liable for any damages
  • arising from the use of this software.
  • Permission is granted to anyone to use this software for any purpose,
  • including commercial applications, and to alter it and redistribute it
  • freely, subject to the following restrictions:
    1. The origin of this software must not be misrepresented; you must not
  • claim that you wrote the original software. If you use this software
  • in a product, an acknowledgment in the product documentation would be
  • appreciated but is not required.
    1. Altered source versions must be plainly marked as such, and must not be
  • misrepresented as being the original software.
    1. This notice may not be removed or altered from any source distribution.
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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data